Hardware Design Verification Engineer
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ARTERIS POLAND SPÓŁKA Z OGRANICZONĄ ODPOWIEDZIALNOŚCIĄ
Kraków
Hardware Design Verification Engineer Miejsce pracy: Kraków Technologies we use Expected SystemVerilog VHDL Your responsibilities Definition, documentation, development, and execution of simulation based verification test for Arteris Register Bank compiler tool, able to run on any available RTL simulator (Cadence, Synopsys, Siemens). Definition, documentation, development, and execution of... |
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3 godziny temu
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